D. Drusinsky. The Temporal Rover and the ATG Rover.
Springer-Verlag Lecture Notes in Computer Science, 1885, p. 323-329.
D. Drusinsky, G. Watney, Applying Run-Time Monitoring to the Deep-Impact Fault Protection Engine, 28th IEEE/NASA ICECCS
workshop, 2003.
D. Drusinsky, Real-time,On-line,Low Impact, Temporal Pattern Matching, 7th World Multiconference on Systemics,
Cybernetics and Informatics (SCI 2003).
D. Drusinsky, Monitoring Temporal Logic Specifications Combined with Time Series, Proc. IEEE 4th Formal
Specifications Symposium, FSCBS2003.
D. Drusinsky, Monitoring Temporal Rules Combined with Time Series, Proc. 2003 Computer Aided Verification
Conference (CAV).
D. Drusinsky and M. Shing. Verification of Timing Properties in Rapid System Prototyping, Proc. Rapid System
Prototyping Conference 2003 (RSP'2003).
D. Drusinsky and M. Shing, Monitoring Temporal Logic Specifications Combined with Time Series Constraints,
Journal of Universal Computer Science (JUCS), vol. 9, no. 11 (2003), 1261-1276.
D. Drusinsky and K. Havelund, Execution-Based Real-Time and Time Series Model Checking,
Workshop on Model-Checking for Dependable Software-Intensive Systems (International Conference on Dependable Systems
and Networks, San Francisco, 2003).
C. Artho, D. Drusinsky, A. Goldeberg, K. Havelund, M. Lowry, C. Pasareanu, G. Rosu, W. Visser, Experiments with
Test Case Generation and Runtime Analysis, 10th International Workshop on Abstract State Machines,
Sicily, Italy, 2003, (Invited).
D. Drusinsky, "Semantics and Runtime Monitoring of TLCharts: Statechart Automata with Temporal Logic
Conditioned Transitions," Proc. 4th Runtime Verification Workshop (RV 04), Electronic Notes in Theoretical
Computer Science, vol. 113, Elsevier, 2005, pp. 3-21.
D. Drusinsky, Visual Formal Specification using (N)TLCharts: Statechart Automata with Temporal Logic and Natural
Language Conditioned Transitions. International Workshop on Parallel and Distributed Systems: Testing and Debugging
(PADTAD), 2004.
D. Drusinsky and M. Shing, TLCharts: Armor-plating Harel Statecharts with Temporal Logic Conditions, Proc.
Rapid System Prototyping Conference 2004.
M Auguston, D. Drusinsky, B. Michael, and N. Rowe- Research on Deception in Defense of Information Systems,
Command and Control Research and Technology Symposium (CCRTS) 2004.
D. Drusinsky, J. B. Michael and M. Shing - Behavioral Modeling and Run-Time Verification of
System-of-Systems Architectural Requirements, International Conference on Computing, Communications and Control
Technologies: CCCT'04.
D. Drusinsky, Runtime Monitoring and Software Verification, August 2004, pp. 68-72.
D. Drusinsky and J.L. Fobes, Executable Specifications: Language and Applications, DoD Crosstalk Magazine,
September 2004.
D. Drusinsky, M. Shing and K. Demir, Test-time, Run-time, and Simulation-time Assertions for RSP.,
Proceedings of the 16th IEEE International Workshop on Rapid Systems Prototyping, Montreal, Canada, 8-10 June 2005,
pp. 105-110.
D. Drusinsky, Run-time Monitoring of Knowledge Temporal Logic Specifications, 2.nd International Conference on
Informatics in Control, Automation and Robotics, Barcelona 2005 (ICINCO 2005), accepted for publication.
D. Drusinsky, Run-time Monitoring and Recovery of Harel Statecharts using Prioritized Non-deterministic
Statechart Specifications, 48.th IEEE International Midwest Symposium on Circuits and Systems, Cincinnati OH, 2005
(MWSCAS 2005), pp. 323-326.
D. Drusinsky, Model Checking of Statecharts using Automatic White Box Test Generation, 48.th IEEE International
Midwest Symposium on Circuits and Systems, Cincinnati OH, 2005 (MWSCAS 2005). pp. 327-332.
D. Drusinsky and M. Shing, Creation and Evaluation of Formal Specifications for System-of-Systems Development.,
Proceedings of the 2005 IEEE International Conference on Systems, Man and Cybernetics, Waikoloa, Hawaii, 10-12 October,
2005, pp. 1864-1869.
D. Drusinsky, D. P. Hinchcliffe, C. Kauffman, E. Stein, G.S. Pringle, Improving Battle Management Software Quality
through Formal Specification and Model-Based Development, 4th Annual Missile Defense Conference, April 2006, Arlington, VA.
K. Demir, D. Drusinsky, M. Shing,
Creation and Evaluation of Embedded Assertion Statecharts, 17th IEEE International Workshop on Rapid Systems Prototyping,
2006, Chania, Greece, 14-16 June 2006, pp. 17-23.
M. Shing, D. Drusinsky and T. Cook, Quality Assurance of the Timing Properties of Real-time, Reactive System-of-systems.,
Proceedings of the 2006 IEEE International Conference on System of Systems Engineering, Los Angeles, CA, 24-26 April, 2006,
pp. 224-229.
D. Drusinsky "On-line Monitoring of Metric Temporal Logic with Time-Series Constraints Using Alternating
Finite Automata", Journal of Universal Computer Science, Vol. 12, No. 5, pp. 482-498.
M. Shing and D. Drusinsky, Architectural Design, Behavior Modeling and Run-Time Verification of Network Embedded
Systems, Proceedings of the Monterey Workshop 2005: Reliable Systems on Unreliable Networked Platforms, Lecture Notes
in Computer Science 4322, Springer, 2007, pp. 281-303.
K. Demir, D. Drusinsky and M. Shing, Creating and Validating Embedded Assertion Statecharts, IEEE Distributed
Systems Online, http://dsonline.computer.org/portal/pages/dsonline/2007/05/o5003.html.
D. Drusinsky and M. Shing, .Verifying Distributed Protocols using MSC-Assertions, Run-time Monitoring, and Automatic
Test Generation., Proceedings of the 18th IEEE/IFIP International Workshop on Rapid Systems Prototyping, Porto Alegre,
Brazil, 28-30 June 2007, pp. 82-88.
D. Drusinsky, M. Shing, and K. Demir,
"Creating and Validating Embedded Assertion Statecharts,"
IEEE Distributed Systems Online, 8(5), 2007, art. no. 0705-o5003.
Tom Cook, D. Drusinsky, and M. Shing,
Specification, Validation and Run-time Monitoring of SOA Based System-of-Systems Temporal Behaviors
Proceedings of the 2007 IEEE International Conference on System of Systems Engineering, San Antonio, TX, 16-18 April 2007.
T. W. Otani, M. Auguston, T. S. Cook, D. Drusinsky, J. B. Michael, and M. Shing,
"A design pattern for using non-developmental items in real-time Java",
Proceedings of the 5th international workshop on Java technologies for real-time and embedded systems (JTRES 2007),
Vienna, Austria, September 26 - 28, 2007, pp. 135-143.
D. Drusinsky and M. Shing, Verifying Distributed Protocols
using MSC-Assertions, Run-time Monitoring, and Automatic Test Generation., Proceedings of the 18th IEEE/IFIP
International Workshop on Rapid Systems Prototyping,
Porto Alegre, Brazil, 28-30 June 2007, pp. 82-88.
D. Drusinsky, B. Michael, M. Shing, Dimensions of Formal Validation and Verification, Sept, 24, 2007, NASA SAS
Workshop on Validation, Morgantown, WV.
D. Drusinsky, B. Michael, M. Shing, A framework for computer-aided validation, Innovations in Systems and
Software Engineering, 4(2), June 2008, pp. 161-168.
D. Drusinsky, J.B. Michael, T.W. Otani and M. Shing, Integrating Statechart Assertions into Java Components Using AspectJ.,
Proceedings of the 2008 IEEE International Conference on System of Systems Engineering, Monterey, CA, 2-4 June 2008.
D. Drusinsky, From UML Activity Diagrams to Specification Requirements,
Proceedings of the 2008 IEEE International Conference on System of Systems Engineering, Monterey, CA, 2-4 June 2008.
D. Drusinsky, B. Michael, T. Otani, M. Shing, .Validating UML Statechart-Based Assertions Libraries for
Improved Reliability and Assurance,. Proceedings of the Second International Conference on Secure System Integration
and Reliability Improvement (SSIRI 2008), Yokohama, Japan, 14-17 July 2008, pp. 47-51. Best paper award.
Drusinsky, D. Michael, J. B., and Shing, M. T. , A Visual Tradeoff Space for Formal Verification and Validation
Techniques, IEEE Systems Journal, Vol. 2, No. 4, Dec 2008, pp. 513-519. ISSN: 1932-8184.